1. Field of the Invention
The present invention relates in general to monitoring a voltage level at a specified detection point such as a pin of an integrated circuit. More particularly, the present invention relates to monitoring the supply voltage of an integrated circuit, and to inhibit such integrated circuit during power up. However, the present invention is not limited to application in integrated circuits. Further, the present invention is not limited to monitoring a supply voltage, but the present invention can be utilized for monitoring any voltage level. In the following, however, the present invention will be explained in the context of a power-up situation of an integrated circuit.
2. Description of the Related Art
When an electronic circuit such as an integrated circuit is initiated or powered-up, i.e. that the supply voltage to such circuit is switched on, the supply voltage will rise from zero to an operational supply voltage within a certain amount of time. During a first stage of the rising of the supply voltage, the supply voltage will be less than a certain minimum voltage at which the circuit is designed to function properly. The functioning of the circuit for a supply voltage below such minimum voltage is undefined; therefore, it is desirable to inhibit any functioning of the circuit until the supply voltage reaches such minimum voltage. Further, it is desirable to assure that the components of the integrated circuit are in a well-defined initial state when the circuit starts to function. Therefore, in general there is a need for a voltage detection circuit generating a signal that is indicative for whether or not the voltage at a detection point has reached a certain threshold level. The output signal generated by such circuit can be applied to other circuitry for inhibiting the functioning thereof.
Such voltage detection circuits are known per se. For instance, EP-A-0.433.696 discloses a voltage detection circuit comprising a load for creating a voltage drop and generating a reduced voltage, which is compared with a reference voltage. An output voltage is HIGH as long as the voltage to be detected is lower than a trip point. When the voltage to be detected exceeds such trip point, the output voltage becomes LOW. For obtaining a desired amount of hysteresis, a feedback signal which is associated with the output voltage controls a switch which shorts at least part of said load in order to reduce said voltage drop and to increase said reduced voltage.
A general disadvantage of conventional supply voltage detection circuits is that the threshold level is fixed and predefined. As a consequence, in view of the fact that in practice the threshold levels in individual chips will show a certain spread, such fixed threshold level must be chosen well above the minimum supply voltage necessary for a correct functioning of the chip. This means that a valid supply voltage range is relatively small.
Further, it is considered a disadvantage that the prior art circuitry operates on voltage signals. A circuit for summing or subtracting signals is relatively complicated when implemented in voltage domain, and will consume relatively much power which results in relatively fast exhaustion of a battery.